Platform Architecture
Project Hardware Profiles
The persisted, authoritative board target that drives dimensions, capabilities and generated ESP-IDF project configuration.
Profile-driven generation
- —Persisted board target and display geometry
- —Generated Wi-Fi, SD and RTC feature gates
- —Target-appropriate sdkconfig, sources, dependencies and CMake registration
- —One normalized profile shared by Live Studio and Standalone Export
- —No manual board patching inside private generated LVGL code
The project hardware profile—not sdkconfig or generated C—is the source of truth. Review generated output through normal source control, but make interface and board-selection changes in Studio. Application behavior remains developer-owned through the Runtime SDK, 95_UserEvents and ordinary modules.
Board profile versus pinout evidence
The Project Hardware Profile remains authoritative for generated export configuration. The separate board pinout master is an audited human-readable electrical and ownership reference; it does not silently configure a project or turn an unallocated pin into a safe pin.
Hardware Example allocations are conditional, not permanent ownership. Example 01 uses GPIO2–5; Example 02 shares the BSP-owned I²C bus on GPIO7/8; Example 03 uses GPIO28–31 plus GPIO2 reset. Re-run the ownership audit whenever the profile, BSP, board revision or selected example changes.
Optional External RTC
Configure this project hardware option at ForgeUI Studio → Board: ESP32-P4 7B → Configure Hardware → Hardware Configuration → Optional Hardware → External RTC. It is intentionally not a runtime System-screen setting.
- —DS3231 support remains available when enabled.
- —Disabled mode generates FG_FEATURE_RTC 0 and performs no DS3231 probing.
- —Software/NVS time fallback remains functional.
- —Live Studio and Standalone Export inherit the same normalized project setting.
- —Legacy projects without the field normalize safely to RTC enabled for backward compatibility.
